(1). Field of the Invention
The invention relates to a signal processing circuit, and, more particularly, to an improved transconductance stage for a MOS mixer circuit.
(2). Description of the Prior Art
Mixer circuits are widely used in modern communication systems. Mixer circuits have a number of uses. A typical application is for translating signals into desirable frequency bands through a technique called modulation. In a mixing or modulation process, an information signal is superimposed upon a carrier signal. In this way, the information signal may be processed or even transmitted without information loss. Another principle application is for demodulation. In demodulation, a modulated information signal is translated down to an intermediate frequency.
Mixers must be designed to minimize intermodulation distortion. This distortion is principally caused by non-linear translations of the input signal and greatly affects the dynamic range of the communication system. Further, mixers should sustain large interference signals without desensitizing. At the same time, the mixer must maintain a low noise figure to optimize the overall system performance.
Referring now to FIG. 1, a prior art mixing circuit is illustrated. The mixer 10 comprises a transconductance stage 14, a double-balanced cell 18, and a load stage 22. In a typical configuration, the information signal is INPUT1. INPUT1 is a differential voltage that is herein labeled INPUT1 xcfx86126 and INPUT1 xcfx86230.
INPUT1 is processed through a transconductance stage 14. The transconductance stage performs a voltage-to-current conversion to create the differential current I1xcfx861 34 and I1xcfx862 38. Ideally, the differential currents I1xcfx861 34 and I1xcfx862 38 are linearly proportional to the differential voltages of INPUT1 xcfx86126 and INPUT1 xcfx86230. The transconductance stage 14 typically comprises a balanced transistor pair as shown in FIG. 2 and as discussed in detail below.
Referring again to FIG. 1, the double-balanced cell 18 is used to commutate the differential currents I1xcfx861 34 and I1xcfx862 38 onto the INPUT2 signal. INPUT2 is typically a carrier signal, such as a local oscillator (LO). Again, INPUT2 is a differential voltage input labeled INPUT2 xcfx86142 and INPUT2 xcfx86246. The double-balanced cell 18 typically comprises a Gilbert cell, as is well established in the art. The double-balanced cell commutates INPUT2 xcfx86142 and INPUT2 xcfx86246 with I1xcfx861 34 and I1xcfx862 38 to create the differential output currents I2xcfx861 50 and I2xcfx862 54.
The load stage 22 is used to convert the differential output currents I2xcfx861 50 and I2xcfx862 54 into an output voltage, OUTPUT. The load stage 22 typically comprises a set of matching resistors that establish a voltage drop in direct proportion to the differential current I2xcfx861 50 and I2xcfx862 54. Alternatively, the load stage may comprise an R-C load, an inductive load, a capacitance load, or a set of transistors for further linearity improvement. Once again, the output voltage, OUTPUT, is a differential voltage comprising OUTPUT xcfx86160 and OUTPUT xcfx86264.
The conventional mixer illustrated in FIG. 1 is an active CMOS mixer. That is, the mixing, or commutating, process is performed with active components such as MOS transistors. Compared to passive CMOS mixers, active mixers provide improved conversion gain and better system noise performance. However, the linearity is generally significantly worse.
Referring now again to FIG. 2, a typical configuration of the transconductance stage is shown. The circuit uses two NMOS transistors, M180 and M284, configured as a balanced pair. In this scheme, a matched pair of NMOS transistors is used. Each device 80 and 84 has the same length and width, the same threshold voltage (Vth) , the same processing parameters, and the same orientation on the substrate. The sources of the transistors 80 and 84 are coupled together and are additionally coupled to a constant current source Is 88. The gates of the transistors 80 and 84 are coupled to the differential input nodes INPUT xcfx86192 and INPUT xcfx86294. The drains of the transistors 80 and 84 are coupled to the double-balanced cell (not shown) as in FIG. 1.
The analysis of the balanced pair is very well known in the art as given by, for example, Gray and Meyer, Analysis and Design of Analog Integrated Circuits, John Wiley and Sons, 1984, pp. 705-709. Of particular importance to the transconductance stage of the mixer, is the transconductance performance of this cell.
Referring now to FIG. 3, the transconductance performance is illustrated. The differential input voltage INPUT xcfx86192 and INPUT xcfx86294 is plotted as xcex94Vxcfx861-xcfx862. The differential output current OUTPUT xcfx86196 and OUTPUT xcfx86298 is plotted as xcex94Ixcfx861-xcfx862. The inherent offset voltage needed to insure that the balanced pair is operating in the linear range is neglected in this plot. As the differential input voltage xcex94Vxcfx861-xcfx862 sweeps from a negative to a positive value, the differential current xcex94Ixcfx861-xcfx862 is generated as shown by plots 100, 104, and 108.
Each plot 100, 104, and 108, represents a different operating condition for the balanced pair. For example, plot 100 represents a condition where there is a small difference between the gate-to-source voltage Vgs and Vth. In this case, the balanced pair exhibits a linear transfer only over a relatively small input voltage range, R1. By comparison, plot 104 and plot 108 demonstrate how the linear range can be increased by increasing the relative gate drive. The input range R2 for plot 108 is much larger than R1 and would, therefore, allow a much larger input voltage swing.
Alternatively, the same increase in input range can be achieved by holding the gate-to-source drive constant but reducing the size of the MOS transistors. The size may be reduced by reducing the width-to-length (W/L) ratio of each device. A pair of small MOS transistors will exhibit an increased linear range as shown by plot 108.
Unfortunately, simply decreasing the transistor size (or simply increasing the gate drive) has the undesirable effect of increasing the noise figure for the transconductance stage. This effect puts a limit on the effectiveness of using simple device size choices to improve the circuit performance. It is desirable to achieve the improved linearity of a small MOS pair and the improved noise figure of a large MOS pair in a single circuit.
Several prior art inventions describe mixer circuits. U.S. Pat. No. 5,589,791 to Gilbert describes a mixer comprising bipolar transistors. A multi-tanh doublet transconductance stage is used to improve linearity. U.S. Pat. No. 6,087,883 to Gilbert teaches bipolar multi-tanh cells wherein ratios of emitter areas and emitter resistors are used to increase the input voltage range of a voltage-to-current converter. U.S. Pat. No. 5,532,637 to Khoury et al discloses a bipolar mixer with a transconductance stage. Degeneration emitter resistors are used to expand the input voltage range. U.S. Pat. No. 5,872,446 to Cranford, Jr. et al shows a CMOS analog multiplier circuit with an extended input range. Finally, the present invention is disclosed by the Applicants in the technical paper by Lim et al, titled xe2x80x9cA Fully Integrated CMOS RF Front-End with On-Chip VCO for WCDMA Application,xe2x80x9d published in the Solid-State Circuits Conference, 2001, Digest of Technical Papers, ISSCC, 01 IEEE International, 2001, pages 286, 287, and 455.
A principal object of the present invention is to provide an effective and very manufacturable transconductance stage for a MOS mixer circuit.
A further object of the present invention is to improve the linearity and noise figure of a transconductance stage of a MOS mixer circuit.
A still further object of the present invention is to improve the linearity and noise figure of a transconductance circuit by using a novel transistor arrangement and size selection.
Another still further object of the present invention is to the improve linearity and the noise figure of a MOS mixing circuit using the improved transconductance circuit.
Another yet still further object of the present invention is to improve linearity and noise figure without consuming more current.
In accordance with the objects of this invention, a new linearized transconductance circuit for converting an input into an output has been achieved. This linearized transconductance circuit is especially suited for application in a mixing circuit using a double-balanced cell. The input comprises first and second phases having a differential voltage therebetween. The output comprises first and second phases having a differential current therebetween that is proportional to the differential voltage. The circuit comprises, firstly, first, second, third, and fourth MOS transistors, with each transistor having a gate, a drain, and a source. The gates of the first and third MOS transistors are coupled to the input first phase. The drains of the first and third transistors are coupled to the output first phase. The gates of the second and fourth MOS transistors are coupled to the input second phase. The drains of the second and fourth MOS transistors are coupled to the output second phase. A first constant current source is coupled to the sources of the first and fourth MOS transistors. Finally, a second constant current source is coupled to the sources of second and third MOS transistors.